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| (R) TS27L4C,I,M VERY LOW POWER CMOS QUAD OPERATIONAL AMPLIFIERS . . . . . ULTRA LOW CONSUMPTIION : 10A/op OUTPUT VOLTAGE CAN SWING TO GROUND EXCELLENT PHASE MARGIN ON CAPACITIVE LOADS STABLE AND LOW OFFSET VOLTAGE THREE INPUT OFFSET VOLTAGE SELECTIONS N DIP14 (Plastic Package) D SO14 (Plastic Micropackage) P TSSOP14 (Thin Shrink Small Outline Package) ORDER CODES Part Number TS27L4C/AC/BC TS27L4I/AI/BI TS27L4M/AM/BM Temperature Range 0oC, +70oC -40 C, +125 C -55 C, +125 C o o o o Package N q q q D q q q P q q q DESCRIPTION The TS274 series are low cost, low power quad operational amplifiers designed to operate with single or dual supplies. These operational amplifiers use the SGS-THOMSON silicon gate CMOS process allowing an excellent consumption-speed ratio. These series are ideally suited for low consumption applications. Three power consumptions are available allowing to have always the best consumption-speed ratio : q ICC= 10A/amp. : TS27L4 (very low power) q ICC= 150A/amp. : TS27M4 (low power) q ICC= 1mA/amp. : TS274 (high speed) These CMOS amplifiers offer very high input impedance and extremely low input currents. The major advantage versus JFET devices is the very low input currents drift with temperature (see figure 2). November 1998 Example : TS27M4ACN PIN CONNECTIONS (top view) Output 1 1 Inverting Input 1 2 Non-inverting Input 1 3 VCC + 4 Non-inverting Input 2 5 Inverting Input 2 6 Output 2 7 + + + + 14 Output 4 13 Inverting Input 4 12 Non-inverting Input 4 11 VCC 10 Non-inverting Input 3 9 8 Inverting Input 3 Output 3 1/9 TS27L4C,I,M BLOCK DIAGRAM VCC Current source xI Input differential Second stage Output stage Output VCC E E MAXIMUM RATINGS Symbol VCC+ Vid Vi IO Iin Toper Supply Voltage - (note 1) Differential Input Voltage - (note 2) Input Voltage - (note 3) Output Current for VCC+ 15V Input Current Operating Free-Air Temperature Range TS27L4C/AC/BC TS27L4I/AI/BI TS27L4M/AM/BM Tstg Storage Temperature Range 0 to +70 -40 to +125 -55 to +125 -65 to +150 o Parameter Value 18 18 -0.3 to 18 30 5 Unit V V V mA mA o C C Notes : 1. All voltage values, except differential voltage, are with respect to network ground terminal. 2. Differential voltages are at the non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage. OPERATING CONDITIONS Symbol VCC+ Vicm Supply Voltage Common Mode Input Voltage Range Parameter Value 3 to 16 0 to VCC - 1.5 + Unit V V 2/9 VCC T 27 T5 T6 T8 T28 T1 T2 T11 T 12 T 10 T 26 T 24 T 25 T 15 SCHEMATIC DIAGRAM (for 1/4 TS27L4) R2 Input R1 C1 Input T 17 T18 T7 Output T 19 T 23 T3 T4 T16 T 20 T 22 T 29 T9 T 13 T 14 T21 VCC TS27L4C,I,M 3/9 TS27L4C,I,M ELECTRICAL CHARACTERISTICS VCC+ = +10V, VCC- = 0V, Tamb = 25oC (unless otherwise specified) Symbol Vio Parameter Input Offset Voltage VO = 1.4V, Vic = 0V TS27L4C/I/M TS27L4AC/AI/AM TS27L4BC/BI/BM Tmin. Tamb Tmax. TS27L4C/I/M TS27L4AC/AI/AM TS27L4BC/BI/BM Input Offset Voltage Drift Input Offset Current - (note 1) Vic = 5V, Vo = 5V Tmin. Tamb Tmax. Input Bias Current - (note 1) Vic = 5V, Vo = 5V Tmin. Tamb Tmax. High Level Output Voltage Vid = 100mV, RL = 1M Tmin. Tamb Tmax. Low Level Output Voltage Vid = -100mV Large Signal Voltage Gain Vo = 1V to 6V, R L = 1M, Vic = 5V Tmin. Tamb Tmax. Gain Bandwidth Product Av = 40dB, RL = 1M, CL = 100pF fin = 10kHz Common Mode Rejection Ratio Vo = 1.4V, Vic = 1V to 7.4V Supply Voltage Rejection Ratio + VCC = 5V to 10V ,Vo = 1.4V Supply Current (per amplifier) Av = 1, no load, Vo = 5V Tmin. Tamb Tmax. Output Short Circuit Current Vid = 100mV, Vo = 0V Output Sink Current Vid = -100mV, Vo = VCC Slew-Rate at Unity Gain R L = 1M, CL= 100pF, Vi = 3 to 7V Phase Margin at Unity Gain Av = 40dB, RL = 1M, CL= 100pF Overshoot Factor Equivalent Input Noise Voltage f = 1kHz, R S = 100 Channel Separation 65 60 60 45 100 8.8 8.7 TS27L4C/AC/BC Min. Typ. 1.1 0.9 0.25 Max. 10 5 2 12 6.5 3 TS27L4I/AI/BI TS27L4M/AM/BM Min. Typ. 1.1 0.9 0.25 Max. mV 10 5 2 12 6.5 3.5 V/ C pA 1 100 1 150 9 8.8 8.6 50 60 40 100 MHz 0.1 0.1 dB 80 80 10 15 17 65 60 80 dB 80 10 15 18 A 9 mV 50 V/mV 1 300 V 1 200 pA o Unit DV io Iio 0.7 0.7 Iib VOH VOL Avd GBP CMR SVR ICC Io Isink SR m Kov en VO1/VO2 mA 60 45 0.04 45 30 68 120 60 mA 45 V/s 0.04 Degrees 45 30 68 120 % nV Hz dB Note : 1. Maximum values including unavoidable inaccuracies of the industrial test. 4/9 TS27L4C,I,M TYPICAL CHARACTERISTICS Figure 1 : Supply Current (each amplifier) versus Supply Voltage SUPPLY CURRENT, ICC ( A) 2.0 1.5 1.0 0.5 Ta mb = 25 C AV = 1 V =V /2 O CC Figure 2 : Input Bias Current versus Free Air Temperature INPUT BIASCURRENT, I IB (pA) 100 VCC = 10V Vic = 5V 10 1 25 50 75 100 125 TEMPERATURE, T amb (C) 0 4 8 12 S UP P LY VOLTAGE, V (V) CC 16 Figure 3a : High Level Output Voltage versus High Level Output Current OUTPUT VOLTAGE, V OH (V) 5 4 3 2 VCC = 3V 1 0 T amb = 25C V id = 100mV VCC = 5V Figure 3b : High Level Output Voltage versus High Level Output Current OUTPUT VOLTAGE, V OH (V) 20 16 12 8 4 0 -50 VCC = 10V Tamb = 25C V id = 100mV VCC = 16V -10 -8 -6 -4 -2 OUTPUT CURRENT, I OH (mA) 0 -40 -30 -20 -10 OUTPUT CURRENT, I OH (mA) 0 Figure 4a : Low Level Output Voltage versus Low Level Output Current OUTPUT VOLTAGE, V OL (V) 1.0 0.8 0.6 0.4 0.2 T a mb = 25 C Vic = 0.5V V = -100mV id Figure 4b : Low Level Output Voltage versus Low Level Output Current OUTPUT VOLTAGE, VOL (V) 3 VCC = 10V VCC = 16V V CC = 3V V CC = 5V 2 1 T a mb = 25 C V i = 0.5V V = -100mV id 0 1 2 OUTPUT CURRENT, I OL (mA) 3 0 4 8 12 16 OUTPUT CURRENT, I OL (mA) 20 5/9 TS27L4C,I,M TYPICAL CHARACTERISTICS (continued) Figure 5 : Open Loop Frequency Response and Phase Shift 50 40 GAIN GAIN (dB) 30 20 10 0 -10 10 2 Figure 6 : Gain Bandwidth Product versus Supply Voltage GAIN BANDW. PROD., GBP (MHz) 120 100 80 60 40 T amb = 25 C R L = 1M C L = 100pF AV = 1 0 45 P ha s e Margin PHASE Ta mb = 25 C VCC+ = 10V R = 1M C L = 100pF A L = 100 VCL 3 4 90 135 Ga in Ba ndwidth P roduc t 5 6 180 10 10 10 10 FREQUENCY, f (Hz) 10 7 PHASE (Degrees) 0 4 8 12 16 S UP P LYVOLTAGE, VCC (V) Figure 7 : Phase Margin versus Supply Voltage m (Degrees) 60 T a mb = 25 C R L = 1M C = 1 00 pF AL = 1 V Figure 8 : Phase Margin versus Capacitive Load PHASE MARGIN, m (Degrees) 80 70 60 50 40 0 20 40 60 80 10 0 CAPACITANCE, C L (pF) Ta mb = 25 C R L = 1M AV = 1 VCC = 10V 50 MARGIN, PHASE 40 30 0 4 8 12 S UP P LY VOLTAGE, VCC (V) 16 Figure 9 : Slew Rates versus Supply Voltage 0.05 Figure 10 : Input Voltage Noise versus Frequency EQUIVALENTINPUT NOISE VOLTAGE (nV/VHz) 300 SLEW RATES, SR (V/s) Ta mb = 25 C R L = 1M C = 100pF L SR VCC = 10V Tamb = 25C 200 0.04 SR R S = 100 0.03 100 0.02 4 6 8 10 12 14 S UP P LY VOLTAGE, V CC (V) 16 0 1 100 10 FREQUENCY (Hz) 1000 6/9 TS27L4C,I,M PACKAGE MECHANICAL DATA 14 PINS - PLASTIC DIP Dim. a1 B b b1 D E e e3 F i L Z Millimeters Min. 0.51 1.39 0.5 0.25 20 8.5 2.54 15.24 7.1 5.1 3.3 1.27 2.54 0.050 1.65 Typ. Max. Min. 0.020 0.055 Inches Typ. Max. 0.065 0.020 0.010 0.787 0.335 0.100 0.600 0.280 0.201 0.130 0.100 DIP14.TBL 7/9 PM-DIP14.EPS TS27L4C,I,M PACKAGE MECHANICAL DATA 14 PINS - PLASTIC MICROPACKAGE (SO) Dim. A a1 a2 b b1 C c1 D E e e3 F G L M S Min. 0.1 0.35 0.19 Millimeters Typ. Max. 1.75 0.2 1.6 0.46 0.25 45 (typ.) o Min. 0.004 0.014 0.007 Inches Typ. Max. 0.069 0.008 0.063 0.018 0.010 0.5 8.55 5.8 1.27 7.62 3.8 4.6 0.5 4.0 5.3 1.27 0.68 8 (max.) o 0.020 8.75 6.2 0.336 0.228 0.050 0.300 0.150 0.181 0.020 0.157 0.208 0.050 0.027 0.334 0.244 8/9 SO14.TBL PM-SO14.EPS TS27L4C,I,M PACKAGE MECHANICAL DATA 14 PINS - THIN SHRINK SMALL OUTLINE PACKAGE Dim. A A1 A2 b c D E E1 e k l Millimeters Min. 0.05 0.80 0.19 0.09 4.90 4.30 0o 0.50 0.60 5.00 6.40 4.40 0.65 8o 0.75 0o 0.09 4.50 0.169 1.00 Typ. Max. 1.20 0.15 1.05 0.30 0.20 5.10 0.01 0.031 0.007 0.003 0.192 Min. Inches Typ. Max. 0.05 0.006 0.039 0.041 0.15 0.012 0.196 0.252 0.173 0.025 8o 0.0236 0.030 0.177 0.20 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infri ngement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publ ication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for useas critical components inlife support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a trademark of STMicroelectronics ORDER CODE : (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. (c) http://www.st.com 9/9 |
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